1 idt74fct163244a/c 3.3v cmos 16-bit buffer/line driver industrial temperature range september 2009 idt74fct163244a/c industrial temperature range 3.3v cmos 16-bit buffer/line driver the idt logo is a registered trademark of integrated device technology, inc. ? 2009 integrated device technology, inc. dsc-2532/12 features: ? 0.5 micron cmos technology ? typical t sk(o) (output skew) < 250ps ? esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ?v cc = 3.3v 0.3v, normal range, or v cc = 2.7v to 3.6v, extended range ? cmos power levels (0.4 w typ. static) ? rail-to-rail output swing for increased noise margin ? low ground bounce (0.3v typ.) ? inputs (except i/o) can be driven by 3.3v or 5v components ? available in ssop, tssop, and tvsop packages functional block diagram description: the fct163244 16-bit buffer/line drivers are built using advanced dual metal cmos technology. these high-speed, low-power devices offer bus/ backplane interface capability with improved packing density. these devices have a flow-through organization for simplifying board layout. the three-state controls operate these devices in a quad-nibble, dual-byte or single 16-bit word mode. all inputs are designed with hysteresis for improved noise margin. the inputs of the fct163244 can be driven from either 3.3v or 5v devices. this feature allows the use of these devices as translators in a mixed 3.3v/5v supply system. thus, the fct163244 can be used as buffers to connect 5v components to a 3.3v bus. 3 oe 3 a 1 3 a 2 3 a 3 3 a 4 3 y 1 3 y 2 3 y 3 3 y 4 1 y 1 1 y 2 1 y 3 1 y 4 1 a 1 1 a 2 1 a 3 1 a 4 1 oe 4 oe 4 a 1 4 a 2 4 a 3 4 a 4 4 y 1 4 y 2 4 y 3 4 y 4 2 oe 2 a 1 2 a 2 2 a 3 2 a 4 2 y 1 2 y 2 2 y 3 2 y 4 1 47 46 44 43 48 41 40 38 37 25 36 35 33 32 24 30 29 27 26 8 9 11 12 2 3 5 6 19 20 22 23 13 14 16 17
2 industrial temperature range idt74fct163244a/c 3.3v cmos 16-bit buffer/line driver ssop/ tssop/ tvsop top view pin configuration symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +4.6 v v term (3) terminal voltage with respect to gnd ?0.5 to 7 v v term (4) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to +60 ma absolute maximum ratings (1) (1) (1) (1) (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. vcc terminals. 3. input terminals. 4. outputs and i/o terminals. pin names description x oe 3-state output enable inputs (active low) x a x data inputs x y x 3-state outputs pin description note: 1. h = high voltage level x = don?t care l = low voltage level z = high-impedance inputs outputs x oe xax xyx lll lhh hxz function table (1) 1 y 1 gnd 1 y 3 v cc gnd 3 y 2 gnd v cc gnd 1 y 2 1 y 4 2 y 1 2 y 2 2 y 3 2 y 4 3 y 1 3 y 3 3 y 4 4 y 1 4 y 3 4 y 4 4 y 2 4 oe 1 a 1 1 a 2 gnd 1 a 3 1 a 4 v cc 2 a 1 2 a 2 2 a 3 2 a 4 3 a 1 3 a 2 3 a 3 3 a 4 v cc 4 a 1 4 a 3 4 a 4 4 a 2 gnd gnd gnd 2 oe 3 oe 39 29 30 31 32 33 34 35 36 37 38 25 26 27 28 48 47 41 42 43 44 45 46 40 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 1 oe symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 3.5 6 pf c out output capacitance v out = 0v 3.5 8 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested.
3 idt74fct163244a/c 3.3v cmos 16-bit buffer/line driver industrial temperature range symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level (input pins) guaranteed logic high level 2 ? 5.5 v input high level (i/o pins) 2 ? v cc +0.5 v il input low level (input and i/o pins) guaranteed logic low level ?0.5 ? 0.8 v i ih input high current (input pins) v cc = max. v i = 5.5v ? ? 1 input high current (i/o pins) v i = v cc ?? 1a i il input low current (input pins) v i = gnd ? ? 1 input low current (i/o pins) v i = gnd ? ? 1 i ozh high impedance output current v cc = max. v o = v cc ?? 1a i ozl (3-state output pins) v o = gnd ? ? 1 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i odh output high current v cc = 3.3v, v in = v ih or v il, v o = 1.5v (3) ?36 ?60 ?110 ma i odl output low current v cc = 3.3v, v in = v ih or v il, v o = 1.5v (3) 50 90 200 ma v oh output high voltage v cc = min. i oh = ?0.1ma v cc -0.2 ? ? v in = v ih or v il i oh = ?3ma 2.4 3 ? v v cc = 3v i oh = ?8ma 2.4 (5) 3? v in = v ih or v il v ol output low voltage v cc = min. i ol = 0.1ma ? ? 0.2 v in = v ih or v il i ol = 16ma ? 0.2 0.4 i ol = 24ma ? 0.3 0.55 v v cc = 3v i ol = 24ma ? 0.3 0.5 v in = v ih or v il i os short circuit current (4) v cc = max., v o = gnd (3) ?60 ?135 ?240 ma v h input hysteresis ? ? 150 ? mv i ccl quiescent power supply current v cc = max. ? 0.1 10 a i cch v in = gnd or v cc i ccz dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 2.7v to 3.6v notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 3.3v, +25c ambient. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. v oh = v cc ?0.6v at rated current.
4 industrial temperature range idt74fct163244a/c 3.3v cmos 16-bit buffer/line driver symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current v cc = max. ? 2 30 a ttl inputs high v in = v cc - 0.6v (3) i ccd dynamic power supply v cc = max. v in = v cc ? 50 75 a/ current (4) outputs open v in = gnd mhz x oe = gnd one input togging 50% duty cycle i c total power supply current (6) v cc = max. v in = v cc ? 0.5 0.8 ma outputs open v in = gnd f i = 10mhz 50% duty cycle v in = v cc - 0.6v ? 0.5 0.8 x oe = gnd v in = gnd one bit toggling v cc = max. v in = v cc ?23 (5) outputs open v in = gnd f i = 2.5mhz 50% duty cycle x oe = gnd v in = v cc - 0.6v ? 2 3.3 (5) sixteen bitstogging v in = gnd power supply characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 3.3v, +25c ambient. 3. per ttl driven input. all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + i cc d h n t + i ccd (f cp n cp /2 + fini) i cc = quiescent current (i ccl , i cch and i ccz ) i cc = power supply current for a ttl high input d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp fi = input frequency ni = number of inputs at fi fct163244a fct163224c symbol parameter cond ition (2) min. (3) max. min. (3) max. unit t plh propagation delay c l = 50pf 1.5 4.8 1.5 4.1 ns t phl xax to xyx r l = 500 t pzh output enable time 1.5 6.2 1.5 5.8 ns t pzl t phz output disable time 1.5 5.6 1.5 5.2 ns t plz t sk(o) output skew (4) ? 0.5 ? 0.5 ns switching characteristics over operating range (1) notes: 1. propagation delays and enable/disable times are with v cc = 3.3v0.3v (normal range). for v cc = 2.7 to 3.6v (extended range), all propagation delays and enable/disable times should be degraded by 20%. 2. see test circuit and waveforms. 3. minimum limits are guaranteed but not tested on propagation delays. 4. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design.
5 idt74fct163244a/c 3.3v cmos 16-bit buffer/line driver industrial temperature range pulse generator r t d.u.t . v cc v in c l v out 50pf 500 500 open gnd 6v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control clear etc. t su t h t rem t su t h preset clear clock enable etc. preset synchronous control high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3v 0v output normally low output normally high switch 6v switch gnd v ol 0.3v 0.3v t plz t pzl t pzh t phz 3v 0v 1.5v 1.5v enable disable v oh test circuits and waveforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width test switch open drain disable low 6v enable low disable high gnd enable high all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. 3. if v cc is below 3v, input voltage swings should be adjusted not to exceed v cc .
6 industrial temperature range idt74fct163244a/c 3.3v cmos 16-bit buffer/line driver ordering information xx temp. range xxxx device type x package pvg pag pfg shrink small outline package - green thin shrink small outline package - green thin very small outline package - green 244a 244c non-inverting 16-bit buffer/line driver ? 40 c to +85 c 74 fct xxx family 163 double-density 3.3volt corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or 408-284-8200 logichelp@idt.com san jose, ca 95138 fax: 408-284-2775 www.idt.com datasheet document history 09/10/09 pg.6 updated the ordering information by removing the "idt" notation and non rohs part.
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